Finished schematics and preliminary board layout.

This commit is contained in:
Uwe Lippmann 2013-09-22 21:41:33 +02:00
parent b234ceec3f
commit 1318ff1517
10 changed files with 2008 additions and 86 deletions

243
custom_symbols/4007-2.sym Normal file
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@ -0,0 +1,243 @@
v 20110115 2
P 600 900 1000 900 1 0 1
{
T 650 900 5 8 0 1 0 8 1
pintype=out
T 800 950 5 8 1 1 0 0 1
pinnumber=13
T 800 850 5 8 0 1 0 2 1
pinseq=8
T 650 900 9 8 0 1 0 6 1
pinlabel=D_P1
}
P 600 1300 1000 1300 1 0 1
{
T 650 1300 5 8 0 1 0 8 1
pintype=pwr
T 800 1350 5 8 1 1 0 0 1
pinnumber=14
T 800 1250 5 8 0 1 0 2 1
pinseq=7
T 650 1300 9 8 0 1 0 6 1
pinlabel=VDD,S_P1
}
L 600 1400 600 1200 3 0 0 0 -1 -1
L 600 1000 600 800 3 0 0 0 -1 -1
L 600 1150 600 1050 3 0 0 0 -1 -1
L 550 1350 550 850 3 0 0 0 -1 -1
P 600 100 1000 100 1 0 1
{
T 650 100 5 8 0 1 0 8 1
pintype=pwr
T 800 150 5 8 1 1 0 0 1
pinnumber=7
T 800 50 5 8 0 1 0 2 1
pinseq=10
T 650 100 9 8 0 1 0 6 1
pinlabel=VSS,S_N1
}
P 600 500 1000 500 1 0 1
{
T 650 500 5 8 0 1 0 8 1
pintype=out
T 800 550 5 8 1 1 0 0 1
pinnumber=8
T 800 450 5 8 0 1 0 2 1
pinseq=9
T 650 500 9 8 0 1 0 6 1
pinlabel=D_N1
}
L 600 600 600 400 3 0 0 0 -1 -1
L 600 350 600 250 3 0 0 0 -1 -1
L 550 550 550 50 3 0 0 0 -1 -1
L 550 1350 300 1350 3 0 0 0 -1 -1
L 300 1350 300 50 3 0 0 0 -1 -1
L 300 50 550 50 3 0 0 0 -1 -1
P 300 700 0 700 1 0 1
{
T 350 700 5 8 0 1 0 2 1
pintype=in
T 200 750 5 8 1 1 0 6 1
pinnumber=6
T 200 650 5 8 0 1 0 8 1
pinseq=2
T 350 700 9 8 0 1 0 0 1
pinlabel=G1
}
L 600 200 600 0 3 0 0 0 -1 -1
L 625 1050 625 1150 3 0 0 0 -1 -1
L 625 1050 675 1100 3 0 0 0 -1 -1
L 675 1100 625 1150 3 0 0 0 -1 -1
L 675 1050 675 1150 3 0 0 0 -1 -1
L 675 1100 700 1100 3 0 0 0 -1 -1
L 700 1100 700 1300 3 0 0 0 -1 -1
L 675 250 675 350 3 0 0 0 -1 -1
L 675 250 625 300 3 0 0 0 -1 -1
L 625 300 675 350 3 0 0 0 -1 -1
L 625 250 625 350 3 0 0 0 -1 -1
L 675 300 700 300 3 0 0 0 -1 -1
L 700 100 700 300 3 0 0 0 -1 -1
L 600 300 625 300 3 0 0 0 -1 -1
L 600 1100 625 1100 3 0 0 0 -1 -1
P 3600 900 4000 900 1 0 1
{
T 3650 900 5 8 0 1 0 8 1
pintype=out
T 3800 950 5 8 1 1 0 0 1
pinnumber=1
T 3800 850 5 8 0 1 0 2 1
pinseq=12
T 3650 900 9 8 0 1 0 6 1
pinlabel=D_P2
}
P 3600 1300 4000 1300 1 0 1
{
T 3650 1300 5 8 0 1 0 8 1
pintype=out
T 3800 1350 5 8 1 1 0 0 1
pinnumber=2
T 3800 1250 5 8 0 1 0 2 1
pinseq=11
T 3650 1300 9 8 0 1 0 6 1
pinlabel=S_P2
}
L 3600 1400 3600 1200 3 0 0 0 -1 -1
L 3600 1000 3600 800 3 0 0 0 -1 -1
L 3600 1150 3600 1050 3 0 0 0 -1 -1
L 3550 1350 3550 850 3 0 0 0 -1 -1
P 3600 100 4000 100 1 0 1
{
T 3650 100 5 8 0 1 0 8 1
pintype=out
T 3800 150 5 8 1 1 0 0 1
pinnumber=4
T 3800 50 5 8 0 1 0 2 1
pinseq=4
T 3650 100 9 8 0 1 0 6 1
pinlabel=S_N2
}
P 3600 500 4000 500 1 0 1
{
T 3650 500 5 8 0 1 0 8 1
pintype=out
T 3800 550 5 8 1 1 0 0 1
pinnumber=5
T 3800 450 5 8 0 1 0 2 1
pinseq=13
T 3650 500 9 8 0 1 0 6 1
pinlabel=D_N2
}
L 3600 600 3600 400 3 0 0 0 -1 -1
L 3600 350 3600 250 3 0 0 0 -1 -1
L 3550 550 3550 50 3 0 0 0 -1 -1
L 3550 1350 3300 1350 3 0 0 0 -1 -1
L 3300 1350 3300 50 3 0 0 0 -1 -1
L 3300 50 3550 50 3 0 0 0 -1 -1
P 3300 700 3000 700 1 0 1
{
T 3350 700 5 8 0 1 0 2 1
pintype=in
T 3200 750 5 8 1 1 0 6 1
pinnumber=3
T 3200 650 5 8 0 1 0 8 1
pinseq=1
T 3350 700 9 8 0 1 0 0 1
pinlabel=G2
}
L 3600 200 3600 0 3 0 0 0 -1 -1
L 3625 1050 3625 1150 3 0 0 0 -1 -1
L 3625 1050 3675 1100 3 0 0 0 -1 -1
L 3675 1100 3625 1150 3 0 0 0 -1 -1
L 3675 1050 3675 1150 3 0 0 0 -1 -1
L 3675 1100 3700 1100 3 0 0 0 -1 -1
L 3800 1100 3700 1100 3 0 0 0 -1 -1
L 3675 250 3675 350 3 0 0 0 -1 -1
L 3675 250 3625 300 3 0 0 0 -1 -1
L 3625 300 3675 350 3 0 0 0 -1 -1
L 3625 250 3625 350 3 0 0 0 -1 -1
L 3675 300 3700 300 3 0 0 0 -1 -1
L 3800 300 3700 300 3 0 0 0 -1 -1
L 3600 300 3625 300 3 0 0 0 -1 -1
L 3600 1100 3625 1100 3 0 0 0 -1 -1
P 6700 700 7000 700 1 0 1
{
T 6650 700 5 8 0 1 0 8 1
pintype=out
T 6800 750 5 8 1 1 0 0 1
pinnumber=12
T 6800 650 5 8 0 1 0 2 1
pinseq=5
T 6650 700 9 8 0 1 0 6 1
pinlabel=D_N/P3
}
P 6600 1300 7000 1300 1 0 1
{
T 6650 1300 5 8 0 1 0 8 1
pintype=out
T 6800 1350 5 8 1 1 0 0 1
pinnumber=11
T 6800 1250 5 8 0 1 0 2 1
pinseq=14
T 6650 1300 9 8 0 1 0 6 1
pinlabel=S_P3
}
L 6600 1400 6600 1200 3 0 0 0 -1 -1
L 6600 1000 6600 800 3 0 0 0 -1 -1
L 6600 1150 6600 1050 3 0 0 0 -1 -1
L 6550 1350 6550 850 3 0 0 0 -1 -1
P 6600 100 7000 100 1 0 1
{
T 6650 100 5 8 0 1 0 8 1
pintype=out
T 6800 150 5 8 1 1 0 0 1
pinnumber=9
T 6800 50 5 8 0 1 0 2 1
pinseq=6
T 6650 100 9 8 0 1 0 6 1
pinlabel=S_N3
}
L 6600 600 6600 400 3 0 0 0 -1 -1
L 6600 350 6600 250 3 0 0 0 -1 -1
L 6550 550 6550 50 3 0 0 0 -1 -1
L 6550 1350 6300 1350 3 0 0 0 -1 -1
L 6300 1350 6300 50 3 0 0 0 -1 -1
L 6300 50 6550 50 3 0 0 0 -1 -1
P 6300 700 6000 700 1 0 1
{
T 6350 700 5 8 0 1 0 2 1
pintype=in
T 6200 750 5 8 1 1 0 6 1
pinnumber=10
T 6200 650 5 8 0 1 0 8 1
pinseq=3
T 6350 700 9 8 0 1 0 0 1
pinlabel=G3
}
L 6600 200 6600 0 3 0 0 0 -1 -1
L 6625 1050 6625 1150 3 0 0 0 -1 -1
L 6625 1050 6675 1100 3 0 0 0 -1 -1
L 6675 1100 6625 1150 3 0 0 0 -1 -1
L 6675 1050 6675 1150 3 0 0 0 -1 -1
L 6675 1100 6700 1100 3 0 0 0 -1 -1
L 6800 1100 6700 1100 3 0 0 0 -1 -1
L 6675 250 6675 350 3 0 0 0 -1 -1
L 6675 250 6625 300 3 0 0 0 -1 -1
L 6625 300 6675 350 3 0 0 0 -1 -1
L 6625 250 6625 350 3 0 0 0 -1 -1
L 6675 300 6700 300 3 0 0 0 -1 -1
L 6800 300 6700 300 3 0 0 0 -1 -1
L 6600 300 6625 300 3 0 0 0 -1 -1
L 6600 1100 6625 1100 3 0 0 0 -1 -1
L 6600 900 6700 900 3 0 0 0 -1 -1
L 6600 500 6700 500 3 0 0 0 -1 -1
L 6700 500 6700 900 3 0 0 0 -1 -1
T 100 1500 8 10 1 1 0 0 1
refdes=U?
T 800 4800 5 10 0 0 0 0 1
device=4007
T 800 5200 5 10 0 0 0 0 1
footprint=DIP14
T 800 5400 5 10 0 0 0 0 1
description=dual complementary pair and inverter
T 800 5000 5 10 0 0 0 0 1
numslots=0

35
custom_symbols/ldr-1.sym Normal file
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@ -0,0 +1,35 @@
v 20110115 2
P 800 400 600 400 1 0 0
{
T 700 450 5 8 0 1 0 0 1
pinnumber=2
T 700 450 5 8 0 0 0 0 1
pinseq=2
T 700 450 5 8 0 1 0 0 1
pinlabel=2
T 700 450 5 8 0 1 0 0 1
pintype=pas
}
P 0 400 200 400 1 0 0
{
T 100 450 5 8 0 1 0 0 1
pinnumber=1
T 100 450 5 8 0 0 0 0 1
pinseq=1
T 100 450 5 8 0 1 0 0 1
pinlabel=1
T 100 450 5 8 0 1 0 0 1
pintype=pas
}
B 200 300 400 200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 400 350 5 10 0 0 0 0 1
device=RESISTOR
T 0 800 8 10 1 1 0 0 1
refdes=R?
V 400 400 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
L 950 850 700 600 3 0 0 0 -1 -1
L 850 950 600 700 3 0 0 0 -1 -1
L 700 600 800 650 3 0 0 0 -1 -1
L 700 600 750 700 3 0 0 0 -1 -1
L 600 700 650 800 3 0 0 0 -1 -1
L 600 700 700 750 3 0 0 0 -1 -1

39
custom_symbols/led-2.sym Normal file
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@ -0,0 +1,39 @@
v 20110115 2
T 800 300 8 10 1 1 0 0 1
refdes=D?
T 100 600 8 10 0 0 0 0 1
device=LED
P 0 100 200 100 1 0 0
{
T 100 150 5 8 0 1 0 0 1
pinnumber=1
T 100 150 5 8 0 0 0 0 1
pinseq=1
T 100 150 5 8 0 1 0 0 1
pinlabel=1
T 100 150 5 8 0 1 0 0 1
pintype=pas
}
P 900 100 700 100 1 0 0
{
T 700 150 5 8 0 1 0 0 1
pinnumber=2
T 700 150 5 8 0 0 0 0 1
pinseq=2
T 700 150 5 8 0 1 0 0 1
pinlabel=2
T 700 150 5 8 0 1 0 0 1
pintype=pas
}
L 300 200 500 100 3 0 0 0 -1 -1
L 500 100 300 0 3 0 0 0 -1 -1
L 300 200 300 0 3 0 0 0 -1 -1
L 500 200 500 0 3 0 0 0 -1 -1
L 500 100 700 100 3 0 0 0 -1 -1
L 300 100 200 100 3 0 0 0 -1 -1
L 430 240 530 340 3 0 0 0 -1 -1
L 530 340 480 310 3 0 0 0 -1 -1
L 530 340 500 290 3 0 0 0 -1 -1
L 500 240 600 340 3 0 0 0 -1 -1
L 600 340 550 310 3 0 0 0 -1 -1
L 600 340 570 290 3 0 0 0 -1 -1

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@ -0,0 +1,33 @@
v 20110115 2
L 1000 1500 1000 500 3 0 0 0 -1 -1
T 100 300 9 10 1 0 0 0 1
SPEAKER
P 400 1200 0 1200 1 0 1
{
T 50 1250 5 10 0 1 0 0 1
pinnumber=1
T 50 1250 5 10 0 0 0 0 1
pinseq=1
T 50 1250 5 10 0 1 0 0 1
pinlabel=1
T 50 1250 5 10 0 1 0 0 1
pintype=pas
}
P 400 800 0 800 1 0 1
{
T 0 850 5 10 0 1 0 0 1
pinnumber=2
T 0 850 5 10 0 0 0 0 1
pinseq=2
T 0 850 5 10 0 1 0 0 1
pinlabel=2
T 0 850 5 10 0 1 0 0 1
pintype=pas
}
B 400 700 300 600 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 2000 2500 5 10 0 0 0 0 1
device=SPEAKER
L 700 1300 1000 1500 3 0 0 0 -1 -1
L 700 700 1000 500 3 0 0 0 -1 -1
T 300 1500 8 10 1 1 0 0 1
refdes=SPK?

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@ -0,0 +1,12 @@
Element["" "" "" "" 51000 63000 0 0 0 100 ""]
(
Pin[0 -10000 6000 3000 6000 2800 "" "1" ""]
Pin[0 0 6000 3000 6000 2800 "" "C" ""]
Pin[0 10000 6000 3000 6000 2800 "" "2" ""]
ElementLine [4000 20000 4000 -20000 1000]
ElementLine [4000 -20000 22000 -20000 1000]
ElementLine [22000 -20000 22000 20000 1000]
ElementLine [22000 20000 4000 20000 1000]
)

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@ -0,0 +1,28 @@
v 20110115 2
L 200 0 600 200 3 0 0 0 -1 -1
T 400 700 5 10 0 0 0 0 1
device=SPST
P 600 0 800 0 1 0 1
{
T 650 50 5 8 1 1 0 0 1
pinnumber=2
T 650 50 5 8 0 0 0 0 1
pinseq=2
T 650 50 5 8 0 1 0 0 1
pinlabel=2
T 650 50 5 8 0 1 0 0 1
pintype=pas
}
P 200 0 0 0 1 0 1
{
T 100 50 5 8 1 1 0 0 1
pinnumber=1
T 100 50 5 8 0 0 0 0 1
pinseq=1
T 100 50 5 8 0 1 0 0 1
pinlabel=1
T 100 50 5 8 0 1 0 0 1
pintype=pas
}
T 300 300 8 10 1 1 0 0 1
refdes=S?

9
gafrc Normal file
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; -*-Scheme-*-
;;;
;;; Project specific init file for gaf
;;;
; Add custom symbol library
(component-library "./custom_symbols")

1333
light-theremin.pcb Normal file

File diff suppressed because it is too large Load diff

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@ -1,2 +1,2 @@
schematics light-theremin.sch
output-name board
output-name light-theremin

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@ -1,100 +1,290 @@
v 20110115 2
C 40000 40000 1 0 0 title-B.sym
C 47800 46500 1 0 0 lm555-1.sym
C 40000 40000 0 0 0 title-B.sym
C 49900 42900 1 0 0 gnd-1.sym
N 42000 48500 42400 48500 4
{
T 50100 48900 5 10 0 0 0 0 1
device=LM555
T 49600 46500 5 10 1 1 0 0 1
refdes=U?
T 41400 48100 5 10 0 1 0 0 1
netname=BATT+
}
C 52900 48500 1 90 0 photo-resistor-1.sym
C 51500 45700 1 0 0 speaker-2.sym
{
T 52200 49200 5 10 0 0 90 0 1
device=PHOTORESISTOR
T 52200 48700 5 10 1 1 90 0 1
refdes=R?
}
C 52900 47400 1 90 0 photo-resistor-1.sym
{
T 52200 48100 5 10 0 0 90 0 1
device=PHOTORESISTOR
T 52200 47600 5 10 1 1 90 0 1
refdes=R?
}
C 50500 42900 1 0 0 speaker-1.sym
{
T 52500 45400 5 10 0 0 0 0 1
T 53500 48200 5 10 0 0 0 0 1
device=SPEAKER
T 51100 44900 5 10 1 1 0 0 1
refdes=SPK?
T 51800 47200 5 10 1 1 0 0 1
refdes=SPK1
T 51600 45800 5 10 1 1 0 0 1
value=8 Ohm
T 51500 45700 5 10 0 1 0 0 1
footprint=RCY600
}
C 52800 46300 1 90 0 capacitor-1.sym
C 50300 47300 1 0 0 capacitor-4.sym
{
T 52100 46500 5 10 0 0 90 0 1
device=CAPACITOR
T 52300 46500 5 10 1 1 90 0 1
refdes=C?
T 51900 46500 5 10 0 0 90 0 1
symversion=0.1
}
C 51400 46300 1 90 0 capacitor-1.sym
{
T 50700 46500 5 10 0 0 90 0 1
device=CAPACITOR
T 50900 46500 5 10 1 1 90 0 1
refdes=C?
T 50500 46500 5 10 0 0 90 0 1
symversion=0.1
}
C 50000 46200 1 270 0 capacitor-4.sym
{
T 51100 46000 5 10 0 0 270 0 1
T 50500 48400 5 10 0 0 0 0 1
device=POLARIZED_CAPACITOR
T 50500 46000 5 10 1 1 270 0 1
refdes=C?
T 50700 46000 5 10 0 0 270 0 1
T 50500 47800 5 10 1 1 0 0 1
refdes=C3
T 50500 48000 5 10 0 0 0 0 1
symversion=0.1
T 50800 47800 5 10 1 1 0 0 1
value=100µ
T 50300 47300 5 10 0 0 0 0 1
footprint=RCY100P
}
C 47300 49700 1 0 1 switch-spst-1.sym
C 49000 46400 1 90 0 capacitor-1.sym
{
T 46900 50400 5 10 0 0 0 6 1
T 48300 46600 5 10 0 0 90 0 1
device=CAPACITOR
T 48400 47000 5 10 1 1 0 0 1
refdes=C2
T 48100 46600 5 10 0 0 90 0 1
symversion=0.1
T 48400 46600 5 10 1 1 0 0 1
value=0.1µ
T 49000 46400 5 10 0 1 0 0 1
footprint=CK05_type_Capacitor
}
C 46500 44800 1 0 0 capacitor-1.sym
{
T 46700 45500 5 10 0 0 0 0 1
device=CAPACITOR
T 46600 45300 5 10 1 1 0 0 1
refdes=C1
T 46700 45700 5 10 0 0 0 0 1
symversion=0.1
T 47000 45300 5 10 1 1 0 0 1
value=0.1µ
T 46500 44800 5 10 0 1 0 0 1
footprint=CK05_type_Capacitor
}
C 45600 46400 1 90 0 resistor-2.sym
{
T 45250 46800 5 10 0 0 90 0 1
device=RESISTOR
T 45700 46900 5 10 1 1 0 0 1
refdes=R1
T 45700 46700 5 10 1 1 0 0 1
value=2k2
T 45600 46400 5 10 0 1 0 0 1
footprint=R025
}
C 50100 43400 1 90 0 resistor-2.sym
{
T 49750 43800 5 10 0 0 90 0 1
device=RESISTOR
T 50200 43900 5 10 1 1 0 0 1
refdes=R4
T 50200 43700 5 10 1 1 0 0 1
value=200
T 50100 43400 5 10 0 1 0 0 1
footprint=R025
}
C 48200 46400 1 90 0 resistor-2.sym
{
T 47850 46800 5 10 0 0 90 0 1
device=RESISTOR
T 47700 46900 5 10 1 1 0 0 1
refdes=R3
T 47600 46700 5 10 1 1 0 0 1
value=10k
T 48200 46400 5 10 0 1 0 0 1
footprint=R025
}
C 48000 44900 1 0 0 resistor-2.sym
{
T 48400 45250 5 10 0 0 0 0 1
device=RESISTOR
T 48200 45200 5 10 1 1 0 0 1
refdes=R2
T 48500 45200 5 10 1 1 0 0 1
value=8k
T 48000 44900 5 10 1 1 0 0 1
footprint=R025
}
C 54600 46200 1 90 0 resistor-2.sym
{
T 54250 46600 5 10 0 0 90 0 1
device=RESISTOR
T 54700 46700 5 10 1 1 0 0 1
refdes=R6
T 54700 46500 5 10 1 1 0 0 1
value=350
T 54600 46200 5 10 0 1 0 0 1
footprint=R025
}
C 53600 46200 1 90 0 resistor-2.sym
{
T 53250 46600 5 10 0 0 90 0 1
device=RESISTOR
T 53700 46700 5 10 1 1 0 0 1
refdes=R5
T 53700 46500 5 10 1 1 0 0 1
value=350
T 53600 46200 5 10 0 1 0 0 1
footprint=R025
}
C 49400 44500 1 0 0 2N3904-2.sym
{
T 50260 44787 5 10 1 1 0 0 1
device=2N3904
T 50300 45000 5 10 1 1 0 0 1
refdes=Q1
T 50304 45406 5 10 0 0 0 0 1
footprint=TO92
}
C 45900 45300 1 90 0 ldr-1.sym
{
T 45550 45700 5 10 0 0 90 0 1
device=RESISTOR
T 44700 45600 5 10 1 1 0 0 1
refdes=LDR1
T 44600 45400 5 10 1 1 0 0 1
device=905014
T 44500 45200 5 10 1 1 0 0 1
footprint=ACY100
}
C 49600 43500 1 90 0 ldr-1.sym
{
T 49250 43900 5 10 0 0 90 0 1
device=RESISTOR
T 48400 43800 5 10 1 1 0 0 1
refdes=LDR2
T 48300 43600 5 10 1 1 0 0 1
device=905014
T 48300 43400 5 10 1 1 0 0 1
footprint=ACY100
}
C 43000 46800 1 0 0 4007-2.sym
{
T 43000 48100 5 10 1 1 0 0 1
refdes=U1
T 43800 51600 5 10 0 0 0 0 1
device=4007
T 43800 52000 5 10 0 0 0 0 1
footprint=DIP14
}
N 45500 46100 45500 46400 4
N 44000 47300 44000 47700 4
N 44000 47500 46000 47500 4
N 45500 47300 45500 47500 4
N 43000 47500 43000 45000 4
N 43000 45000 46500 45000 4
{
T 43000 45000 5 10 0 1 0 0 1
netname=OscFeedback
}
N 45500 45000 45500 45300 4
N 47000 47300 47000 47700 4
N 47000 47500 47500 47500 4
N 47500 47500 47500 45000 4
N 47400 45000 48000 45000 4
{
T 47400 45000 5 10 0 1 0 0 1
netname=OscOut
}
N 43200 48500 54500 48500 4
{
T 43200 48500 5 10 0 1 0 0 1
netname=+9V
}
N 50000 48500 50000 48100 4
N 47000 48100 47000 48500 4
N 44000 48100 44000 48500 4
N 49000 47500 48800 47500 4
N 50000 45500 50000 45900 4
N 48100 45900 50000 45900 4
{
T 48100 45900 5 10 0 1 0 0 1
netname=PreAmpOut
}
N 48900 45000 49400 45000 4
{
T 48900 45000 5 10 0 1 0 0 1
netname=PreAmpIn
}
N 49200 44300 49200 45000 4
C 43900 46400 1 0 0 gnd-1.sym
C 46900 46400 1 0 0 gnd-1.sym
C 49900 46400 1 0 0 gnd-1.sym
N 50000 46700 50000 46900 4
N 48800 47500 48800 47300 4
{
T 48800 47500 5 10 0 1 0 0 1
netname=AmpIn
}
N 48800 45900 48800 46400 4
N 48100 46400 48100 45900 4
N 48100 47300 48100 48500 4
N 44000 46700 44000 46900 4
N 47000 46700 47000 46900 4
N 50000 44300 50000 44500 4
N 49200 43200 50000 43200 4
N 50000 43200 50000 43400 4
N 49200 43200 49200 43500 4
N 50000 47500 50300 47500 4
{
T 50000 47500 5 10 0 1 0 0 1
netname=AmpOut
}
C 51400 45400 1 0 0 gnd-1.sym
N 51200 47500 51500 47500 4
N 51500 47500 51500 46900 4
{
T 51500 47500 5 10 0 1 0 0 1
netname=SPK+
}
N 51500 46500 51500 45700 4
N 53500 48200 53500 48500 4
N 54500 48200 54500 48500 4
N 53500 47300 53500 47100 4
N 54500 47300 54500 47100 4
C 53400 45400 1 0 0 gnd-1.sym
N 53500 45700 53500 46200 4
N 54500 46200 54500 46000 4
N 54500 46000 53500 46000 4
C 54400 48200 1 270 0 led-2.sym
{
T 54700 47800 5 10 1 1 0 0 1
refdes=LED2
T 55000 48100 5 10 0 0 270 0 1
device=LED
T 54400 48200 5 10 0 1 0 0 1
footprint=T1.75_LED
}
C 53400 48200 1 270 0 led-2.sym
{
T 53700 47800 5 10 1 1 0 0 1
refdes=LED1
T 54000 48100 5 10 0 0 270 0 1
device=LED
T 53400 48200 5 10 0 1 0 0 1
footprint=T1.75_LED
}
C 42400 48500 1 0 0 switch-spst-1.sym
{
T 42800 49200 5 10 0 0 0 0 1
device=SPST
T 47000 50000 5 10 1 1 0 6 1
refdes=S?
T 42700 48800 5 10 1 1 0 0 1
refdes=S1
T 42400 48500 5 10 0 0 0 0 1
footprint=switch-1
}
C 52500 45800 1 0 0 gnd-1.sym
C 45500 49500 1 90 0 generic-power.sym
C 41800 47500 1 270 0 battery-3.sym
{
T 45250 49700 5 10 1 1 90 3 1
net=Vcc:1
T 42500 47200 5 10 0 0 270 0 1
device=BATTERY
T 41400 47000 5 10 1 1 0 0 1
refdes=B1
T 42750 47200 5 10 0 0 270 0 1
symversion=0.1
T 41400 46800 5 10 1 1 0 0 1
value=9V
T 41100 46600 5 10 1 1 0 0 1
footprint=ACY1200
}
N 52600 48300 52600 48500 4
N 52600 47200 52600 47400 4
N 52600 46100 52600 46300 4
N 50100 47600 51200 47600 4
N 51200 47600 51200 47200 4
C 51100 45800 1 0 0 gnd-1.sym
N 51200 46100 51200 46300 4
N 50100 48400 52600 48400 4
N 52600 49400 52600 49700 4
N 47300 49700 52600 49700 4
N 49400 49700 49400 49300 4
N 45500 49700 46500 49700 4
N 50100 48000 51800 48000 4
N 51800 48000 51800 47300 4
N 51800 47300 52600 47300 4
N 48600 49300 48600 49700 4
N 50100 46900 50200 46900 4
N 50200 44800 50500 44800 4
N 50200 46900 50200 46200 4
N 50200 45300 50200 44800 4
N 50500 43600 50200 43600 4
N 50200 43600 50200 43300 4
C 50100 43000 1 0 0 gnd-1.sym
N 47800 48000 47500 48000 4
N 47500 48000 47500 49500 4
N 47500 49500 50700 49500 4
N 50700 49500 50700 48400 4
C 47400 46200 1 0 0 gnd-1.sym
N 47500 46500 47500 46900 4
N 47500 46900 47800 46900 4
C 41900 45200 1 0 0 gnd-1.sym
N 42000 48500 42000 47500 4
{
T 41800 48600 5 10 0 1 0 0 1
netname=BATT+
}
N 42000 46400 42000 45500 4