Finished schematics and preliminary board layout.
This commit is contained in:
Uwe Lippmann
parent
b234ceec3f
commit
1318ff1517
10 changed files with 2008 additions and 86 deletions
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@ -1,100 +1,290 @@
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v 20110115 2
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C 40000 40000 1 0 0 title-B.sym
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C 47800 46500 1 0 0 lm555-1.sym
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C 40000 40000 0 0 0 title-B.sym
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C 49900 42900 1 0 0 gnd-1.sym
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N 42000 48500 42400 48500 4
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{
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T 50100 48900 5 10 0 0 0 0 1
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device=LM555
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T 49600 46500 5 10 1 1 0 0 1
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refdes=U?
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T 41400 48100 5 10 0 1 0 0 1
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netname=BATT+
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}
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C 52900 48500 1 90 0 photo-resistor-1.sym
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C 51500 45700 1 0 0 speaker-2.sym
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{
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T 52200 49200 5 10 0 0 90 0 1
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device=PHOTORESISTOR
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T 52200 48700 5 10 1 1 90 0 1
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refdes=R?
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}
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C 52900 47400 1 90 0 photo-resistor-1.sym
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{
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T 52200 48100 5 10 0 0 90 0 1
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device=PHOTORESISTOR
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T 52200 47600 5 10 1 1 90 0 1
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refdes=R?
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}
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C 50500 42900 1 0 0 speaker-1.sym
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{
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T 52500 45400 5 10 0 0 0 0 1
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T 53500 48200 5 10 0 0 0 0 1
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device=SPEAKER
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T 51100 44900 5 10 1 1 0 0 1
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refdes=SPK?
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T 51800 47200 5 10 1 1 0 0 1
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refdes=SPK1
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T 51600 45800 5 10 1 1 0 0 1
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value=8 Ohm
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T 51500 45700 5 10 0 1 0 0 1
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footprint=RCY600
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}
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C 52800 46300 1 90 0 capacitor-1.sym
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C 50300 47300 1 0 0 capacitor-4.sym
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{
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T 52100 46500 5 10 0 0 90 0 1
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device=CAPACITOR
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T 52300 46500 5 10 1 1 90 0 1
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refdes=C?
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T 51900 46500 5 10 0 0 90 0 1
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symversion=0.1
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}
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C 51400 46300 1 90 0 capacitor-1.sym
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{
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T 50700 46500 5 10 0 0 90 0 1
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device=CAPACITOR
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T 50900 46500 5 10 1 1 90 0 1
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refdes=C?
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T 50500 46500 5 10 0 0 90 0 1
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symversion=0.1
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}
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C 50000 46200 1 270 0 capacitor-4.sym
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{
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T 51100 46000 5 10 0 0 270 0 1
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T 50500 48400 5 10 0 0 0 0 1
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device=POLARIZED_CAPACITOR
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T 50500 46000 5 10 1 1 270 0 1
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refdes=C?
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T 50700 46000 5 10 0 0 270 0 1
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T 50500 47800 5 10 1 1 0 0 1
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refdes=C3
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T 50500 48000 5 10 0 0 0 0 1
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symversion=0.1
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T 50800 47800 5 10 1 1 0 0 1
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value=100µ
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T 50300 47300 5 10 0 0 0 0 1
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footprint=RCY100P
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}
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C 47300 49700 1 0 1 switch-spst-1.sym
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C 49000 46400 1 90 0 capacitor-1.sym
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{
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T 46900 50400 5 10 0 0 0 6 1
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T 48300 46600 5 10 0 0 90 0 1
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device=CAPACITOR
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T 48400 47000 5 10 1 1 0 0 1
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refdes=C2
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T 48100 46600 5 10 0 0 90 0 1
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symversion=0.1
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T 48400 46600 5 10 1 1 0 0 1
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value=0.1µ
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T 49000 46400 5 10 0 1 0 0 1
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footprint=CK05_type_Capacitor
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}
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C 46500 44800 1 0 0 capacitor-1.sym
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{
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T 46700 45500 5 10 0 0 0 0 1
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device=CAPACITOR
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T 46600 45300 5 10 1 1 0 0 1
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refdes=C1
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T 46700 45700 5 10 0 0 0 0 1
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symversion=0.1
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T 47000 45300 5 10 1 1 0 0 1
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value=0.1µ
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T 46500 44800 5 10 0 1 0 0 1
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footprint=CK05_type_Capacitor
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}
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C 45600 46400 1 90 0 resistor-2.sym
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{
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T 45250 46800 5 10 0 0 90 0 1
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device=RESISTOR
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T 45700 46900 5 10 1 1 0 0 1
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refdes=R1
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T 45700 46700 5 10 1 1 0 0 1
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value=2k2
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T 45600 46400 5 10 0 1 0 0 1
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footprint=R025
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}
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C 50100 43400 1 90 0 resistor-2.sym
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{
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T 49750 43800 5 10 0 0 90 0 1
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device=RESISTOR
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T 50200 43900 5 10 1 1 0 0 1
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refdes=R4
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T 50200 43700 5 10 1 1 0 0 1
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value=200
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T 50100 43400 5 10 0 1 0 0 1
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footprint=R025
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}
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C 48200 46400 1 90 0 resistor-2.sym
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{
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T 47850 46800 5 10 0 0 90 0 1
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device=RESISTOR
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T 47700 46900 5 10 1 1 0 0 1
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refdes=R3
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T 47600 46700 5 10 1 1 0 0 1
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value=10k
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T 48200 46400 5 10 0 1 0 0 1
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footprint=R025
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}
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C 48000 44900 1 0 0 resistor-2.sym
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{
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T 48400 45250 5 10 0 0 0 0 1
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device=RESISTOR
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T 48200 45200 5 10 1 1 0 0 1
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refdes=R2
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T 48500 45200 5 10 1 1 0 0 1
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value=8k
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T 48000 44900 5 10 1 1 0 0 1
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footprint=R025
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}
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C 54600 46200 1 90 0 resistor-2.sym
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{
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T 54250 46600 5 10 0 0 90 0 1
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device=RESISTOR
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T 54700 46700 5 10 1 1 0 0 1
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refdes=R6
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T 54700 46500 5 10 1 1 0 0 1
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value=350
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T 54600 46200 5 10 0 1 0 0 1
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footprint=R025
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}
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C 53600 46200 1 90 0 resistor-2.sym
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{
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T 53250 46600 5 10 0 0 90 0 1
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device=RESISTOR
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T 53700 46700 5 10 1 1 0 0 1
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refdes=R5
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T 53700 46500 5 10 1 1 0 0 1
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value=350
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T 53600 46200 5 10 0 1 0 0 1
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footprint=R025
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}
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C 49400 44500 1 0 0 2N3904-2.sym
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{
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T 50260 44787 5 10 1 1 0 0 1
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device=2N3904
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T 50300 45000 5 10 1 1 0 0 1
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refdes=Q1
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T 50304 45406 5 10 0 0 0 0 1
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footprint=TO92
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}
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C 45900 45300 1 90 0 ldr-1.sym
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{
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T 45550 45700 5 10 0 0 90 0 1
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device=RESISTOR
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T 44700 45600 5 10 1 1 0 0 1
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refdes=LDR1
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T 44600 45400 5 10 1 1 0 0 1
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device=905014
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T 44500 45200 5 10 1 1 0 0 1
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footprint=ACY100
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}
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C 49600 43500 1 90 0 ldr-1.sym
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{
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T 49250 43900 5 10 0 0 90 0 1
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device=RESISTOR
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T 48400 43800 5 10 1 1 0 0 1
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refdes=LDR2
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T 48300 43600 5 10 1 1 0 0 1
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device=905014
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T 48300 43400 5 10 1 1 0 0 1
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footprint=ACY100
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}
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C 43000 46800 1 0 0 4007-2.sym
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{
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T 43000 48100 5 10 1 1 0 0 1
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refdes=U1
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T 43800 51600 5 10 0 0 0 0 1
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device=4007
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T 43800 52000 5 10 0 0 0 0 1
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footprint=DIP14
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}
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N 45500 46100 45500 46400 4
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N 44000 47300 44000 47700 4
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N 44000 47500 46000 47500 4
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N 45500 47300 45500 47500 4
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N 43000 47500 43000 45000 4
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N 43000 45000 46500 45000 4
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{
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T 43000 45000 5 10 0 1 0 0 1
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netname=OscFeedback
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}
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N 45500 45000 45500 45300 4
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N 47000 47300 47000 47700 4
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N 47000 47500 47500 47500 4
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N 47500 47500 47500 45000 4
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N 47400 45000 48000 45000 4
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{
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T 47400 45000 5 10 0 1 0 0 1
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netname=OscOut
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}
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N 43200 48500 54500 48500 4
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{
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T 43200 48500 5 10 0 1 0 0 1
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netname=+9V
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}
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N 50000 48500 50000 48100 4
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N 47000 48100 47000 48500 4
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N 44000 48100 44000 48500 4
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N 49000 47500 48800 47500 4
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N 50000 45500 50000 45900 4
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N 48100 45900 50000 45900 4
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{
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T 48100 45900 5 10 0 1 0 0 1
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netname=PreAmpOut
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}
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N 48900 45000 49400 45000 4
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{
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T 48900 45000 5 10 0 1 0 0 1
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netname=PreAmpIn
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}
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N 49200 44300 49200 45000 4
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C 43900 46400 1 0 0 gnd-1.sym
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C 46900 46400 1 0 0 gnd-1.sym
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C 49900 46400 1 0 0 gnd-1.sym
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N 50000 46700 50000 46900 4
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N 48800 47500 48800 47300 4
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{
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T 48800 47500 5 10 0 1 0 0 1
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netname=AmpIn
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}
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N 48800 45900 48800 46400 4
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N 48100 46400 48100 45900 4
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N 48100 47300 48100 48500 4
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N 44000 46700 44000 46900 4
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N 47000 46700 47000 46900 4
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N 50000 44300 50000 44500 4
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N 49200 43200 50000 43200 4
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N 50000 43200 50000 43400 4
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N 49200 43200 49200 43500 4
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N 50000 47500 50300 47500 4
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{
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T 50000 47500 5 10 0 1 0 0 1
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netname=AmpOut
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}
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C 51400 45400 1 0 0 gnd-1.sym
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N 51200 47500 51500 47500 4
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N 51500 47500 51500 46900 4
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{
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T 51500 47500 5 10 0 1 0 0 1
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netname=SPK+
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}
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N 51500 46500 51500 45700 4
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N 53500 48200 53500 48500 4
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N 54500 48200 54500 48500 4
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N 53500 47300 53500 47100 4
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N 54500 47300 54500 47100 4
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C 53400 45400 1 0 0 gnd-1.sym
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N 53500 45700 53500 46200 4
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N 54500 46200 54500 46000 4
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N 54500 46000 53500 46000 4
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C 54400 48200 1 270 0 led-2.sym
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{
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T 54700 47800 5 10 1 1 0 0 1
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refdes=LED2
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T 55000 48100 5 10 0 0 270 0 1
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device=LED
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T 54400 48200 5 10 0 1 0 0 1
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footprint=T1.75_LED
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}
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C 53400 48200 1 270 0 led-2.sym
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{
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T 53700 47800 5 10 1 1 0 0 1
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refdes=LED1
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T 54000 48100 5 10 0 0 270 0 1
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device=LED
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T 53400 48200 5 10 0 1 0 0 1
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footprint=T1.75_LED
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}
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C 42400 48500 1 0 0 switch-spst-1.sym
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{
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T 42800 49200 5 10 0 0 0 0 1
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device=SPST
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T 47000 50000 5 10 1 1 0 6 1
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refdes=S?
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T 42700 48800 5 10 1 1 0 0 1
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refdes=S1
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T 42400 48500 5 10 0 0 0 0 1
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footprint=switch-1
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}
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C 52500 45800 1 0 0 gnd-1.sym
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C 45500 49500 1 90 0 generic-power.sym
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C 41800 47500 1 270 0 battery-3.sym
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{
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T 45250 49700 5 10 1 1 90 3 1
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net=Vcc:1
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T 42500 47200 5 10 0 0 270 0 1
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device=BATTERY
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T 41400 47000 5 10 1 1 0 0 1
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refdes=B1
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T 42750 47200 5 10 0 0 270 0 1
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symversion=0.1
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T 41400 46800 5 10 1 1 0 0 1
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value=9V
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T 41100 46600 5 10 1 1 0 0 1
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footprint=ACY1200
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}
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N 52600 48300 52600 48500 4
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N 52600 47200 52600 47400 4
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N 52600 46100 52600 46300 4
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N 50100 47600 51200 47600 4
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N 51200 47600 51200 47200 4
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C 51100 45800 1 0 0 gnd-1.sym
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N 51200 46100 51200 46300 4
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N 50100 48400 52600 48400 4
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N 52600 49400 52600 49700 4
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N 47300 49700 52600 49700 4
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N 49400 49700 49400 49300 4
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N 45500 49700 46500 49700 4
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N 50100 48000 51800 48000 4
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N 51800 48000 51800 47300 4
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N 51800 47300 52600 47300 4
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N 48600 49300 48600 49700 4
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N 50100 46900 50200 46900 4
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N 50200 44800 50500 44800 4
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N 50200 46900 50200 46200 4
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N 50200 45300 50200 44800 4
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N 50500 43600 50200 43600 4
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N 50200 43600 50200 43300 4
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C 50100 43000 1 0 0 gnd-1.sym
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N 47800 48000 47500 48000 4
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N 47500 48000 47500 49500 4
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N 47500 49500 50700 49500 4
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N 50700 49500 50700 48400 4
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C 47400 46200 1 0 0 gnd-1.sym
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N 47500 46500 47500 46900 4
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N 47500 46900 47800 46900 4
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C 41900 45200 1 0 0 gnd-1.sym
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N 42000 48500 42000 47500 4
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{
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T 41800 48600 5 10 0 1 0 0 1
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netname=BATT+
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}
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N 42000 46400 42000 45500 4
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